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GTS Asset ManagementAlternative asset manager · New York, NY

FPGA Developer - Poland

  • Unavailable
Pay not posted by the firm. We never estimate it.

Posted June 9, 2026Verified live today on GTS Asset Management’s careers site

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About the role

Role
Software engineering
Seniority
Mid
Type
Contractor
Open until
June 9, 2027

Overview

We are looking to hire a senior hardware engineer to join a small and growing FPGA team developing key components of a high-performance FPGA platform. This role offers broad technical scope and exposure across multiple layers of computing technology, from RTL and verification to high-speed interfaces and system integration.

Successful candidates will work on full-stack FPGA systems in a highly collaborative environment, contributing to architecture, implementation, verification, performance optimization, and tooling/CI improvements.

GTS is a collection of financial services companies spanning a wide array of asset classes and investment approaches, all powered by the combination of market expertise with innovative, proprietary technology. With roots as a quantitative trading firm continually building for the future, the GTS family of companies are able to leverage the latest in artificial intelligence systems and sophisticated pricing models to bring consistency, efficiency, and transparency to today’s financial markets. GTS’s electronic market maker GTS Securities accounts for 3-5% of daily cash equities volume in the U.S. and is a leading Designated Market Maker (DMM) at the New York Stock Exchange, responsible for nearly $13 trillion of market capitalization. For more information on GTS, please visit www.gtsx.com.

Qualifications

  • 5+ years of commercial FPGA or ASIC experience as a hardware design engineer
  • Strong logic design expertise using Verilog, SystemVerilog, VHDL, or SystemC
  • Familiarity with modern FPGA architectures such as Xilinx UltraScale+ or Intel Stratix 10
  • Experience with one or more of:
    • 10/25/100GbE Ethernet
    • PCIe and DMA
    • NVMe
    • DDR / QDR / HBM memory systems
  • Experience with EDA tools from vendors such as Xilinx/AMD, Synopsys, Cadence, or Siemens EDA/Mentor Graphics
  • Experience with verification methodologies and frameworks such as Cocotb, UVM, or SystemVerilog Assertions is a plus
  • Static timing analysis experience is a plus
  • Linux driver or kernel development experience is a plus
  • C/C++/Python experience is a plus
  • HLS experience is a plus
  • SpinalHDL/Chisel experience is a plus

We're proud to employ leading talent in the industry and work to ensure our employees enjoy a high quality of life.

Please note: The use of AI tools during interviews is strictly prohibited, unless explicitly agreed upon.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, or protected veteran status, and will not be discriminated against on the basis of disability.

Unsolicited resumes:

We do not accept unsolicited headhunter and agency resumes and will not pay fees to any third-party agency or company that does not have a signed agreement with GTS.

Posted on GTS Asset Management’s careers site and shown here in full, as the firm wrote it. Open the original posting

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